DS537 Datasheet, PDF (120/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC

LogiCORE IP XPS LL TEMAC (v2.03a)
Table 105: SGMII Management Auto negotiation Link Partner Ability Base Register (Register 5) Bit
Definitions (Cont’d)
Bit(s)
Name
Core
Access
Reset
Value
Description
1 - 9 Reserved
Returns 0s
0x0 Always return zeros.
0 Reserved
Returns 1
1
Always return one.
Table 106 shows the Hard TEMAC Internal SGMII PCS Management Auto negotiation Expansion Register bit
definitions.
Table 106: SGMII Management Auto Negotiation Expansion Register (Register 6) Bit Definitions
Bit(s)
Name
Core Access
Reset
Value
Description
3 - 15 Reserved
Returns 0s
0x0 Always return zeros.
2 Next Page Able Returns 1
1
Always returns a 1 for this bit because the device is Next Page Able.
1
Page Received Read self clearing
on read
0
0 - a new page is not received
1 - a new page is received
0 Reserved
Returns 0s
0
Always return zeros.
Table 107 shows the Hard TEMAC Internal SGMII PCS Management Auto Negotiation Next Page Transmit
Register bit definitions.
Table 107: SGMII Management Auto Negotiation Next Page Transmit Register (Register 7) Bit Definitions
Bit(s)
Name
Core
Access
Reset Value
Description
Next Page
15
Read/write
0 - last page
0
1 - additional next page(s) will follow
14 Reserved
Returns 0s
0
Always return zeros.
13 ^{Message Page Read/Write}
1
0 - unformatted page
1 - message page
Acknowledge 2 Read/Write
12
0 - cannot comply with message
0
1 - complies with message
11 Toggle
Read
0
Value toggles between sequent pages.
Message or
0 -10 unformatted
Code Field
Read/Write
0x001 (null
message code)
Message code field or unformatted page encoding as dictated by
bit 13.
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