DS537 Datasheet, PDF (107/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC

LogiCORE IP XPS LL TEMAC (v2.03a)
The following are two types of physical layer interfaces:
• BASE-T provide a link between the XPS_LL_TEMAC and copper mediums. This functionality can be
provided in a XPS_LL_TEMAC system by connecting to external BASE_T PHY devices which are readily
available. This connection can be made using MII, GMII/MII, RGMII, and SGMII interfaces.
• Virtex-5 devices support GMII/MII at 3.3 V or lower.
• BASE-X provide a link between the XPS_LL_TEMAC and (usually) fiber optic mediums. The
XPS_LL_TEMAC system can provide this function at 1000 Mb/S (1000BASE-X) by using a RocketIO
transceiver.
Media Independent Interface (MII)
The Media Independent Interface (MII), defined in IEEE 802.3 clause 22, is a parallel interface that connects at
10-Mb/S and/or 100-Mb/S to external PHY devices.
The MII design uses clock enables. Please refer to UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC User
Guide for an equivalent diagram of the clock management scheme when the XPS_LL_TEMAC parameter
C_INCLUDE_IO = “1”. When the parameter C_INCLUDE_IO = “0”, any BUFGs, IBUFGs, IBUFS, and OBUFs are
not used.
Virtex 5 Hard TEMAC MII Constraints
Refer to Answer Record 32713 for constraint examples. Refer to UG625 for an overview of the various constraints
used.
Gigabit Media Independent Interface (GMII)
The Gigabit Media Independent Interface (GMII), defined in IEEE 802.3 clause 35, is an extension of the MII used to
connect at 1-Gb/S to the PHY devices.
MII can be considered a subset of GMII, and as a result, GMII/MII together can carry Ethernet traffic at 10 Mb/S,
100 Mb/S, and 1 Gb/S.
When the GMII interface is selected with parameters for the XPS_LL_TEMAC, a GMII/MII interface is used which
is capable of all three Ethernet speeds.
The GMII design uses clock enables. Please refer to UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC User
Guide for an equivalent diagram of the clock management scheme when the XPS_LL_TEMAC parameter
C_INCLUDE_IO = “1”. When the parameter C_INCLUDE_IO = “0”, any BUFGs, IBUFGs, IBUFS, OBUFs,
BUFGMUXs, and IDELAYs are not used.
Virtex 5 Hard TEMAC GMII Constraints
Refer to Answer Record 32713 for constraint examples. Refer to UG625 for an overview of the various constraints
used.
Reduced Gigabit Media Independent Interface (RGMII)
The Reduced Gigabit Media Independent Interface (RGMII) is an alternative to the GMII/MII. RGMII achieves a
50% reduction in the pin count compared with GMII, and is therefore favored over GMII/MII by PCB designers.
This is achieved with the use of double-data-rate (DDR) flip-flops.
RGMII can carry Ethernet traffic at 10 Mb/S, 100 Mb/S, and 1 Gb/S.
For more information on RGMII, refer to the Hewlett-Packard RGMII Specification, version 1.3 and 2.0.
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