UPD78F9500MA-CAC-A Datasheet, PDF (89/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 5 CLOCK GENERATORS
Figure 5-13. Status Transition of Default Start by External Clock Input
Power
application
VDD > 2.1 V ±0.1 V
Reset by
power-on clear
Reset signal
External clock input
selected by option byte
Interrupt
HALT
Start with PCC = 02H,
PPCC = 02H
Clock division ratio
variable during
CPU operation
HALT
instruction _STOP
instruction
Interrupt
STOP
Remark PCC: Processor clock control register
PPCC: Preprocessor clock control register
User’s Manual U18172EJ3V0UD
87