UPD78F9500MA-CAC-A Datasheet, PDF (87/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 5 CLOCK GENERATORS
Figure 5-11. Status Transition of Default Start by Crystal/Ceramic Oscillation (μPD78F920x Only)
Power
application
VDD > 2.1 V ±0.1 V
Reset by
power-on clear
Crystal/ceramic
oscillation selected
by option byte
Reset signal
Wait for clock
oscillation stabilization
Interrupt
HALT
Start with PCC = 02H,
PPCC = 02H
Clock division ratio
variable during
CPU operation
HALT
instruction _STOP
instruction
Interrupt
STOP
Remark PCC: Processor clock control register
PPCC: Preprocessor clock control register
User’s Manual U18172EJ3V0UD
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