UPD78F9500MA-CAC-A Datasheet, PDF (300/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 19 ELECTRICAL SPECIFICATIONS
DC Characteristics (2/4)
(1) μPD78F920x (TA = −40 to +85°C, VDD = 2.0 to 5.5 V^{Note 1}, VSS = 0 V) (2/2)
Parameter
Supply
current^{Note 2}
Symbol
Conditions
MIN. TYP. MAX. Unit
I ^{Note 3}
DD1
Crystal/ceramic
oscillation,
external clock
input oscillation
operating
mode^{Note 6}
fX = 10 MHz
VDD = 5.0 V ±10%^{Note 4}
fX = 6 MHz
VDD = 5.0 V ±10%^{Note 4}
fX = 5 MHz
VDD = 3.0 V ±10%^{Note 5}
When A/D converter is stopped
When A/D converter is operating
When A/D converter is stopped
When A/D converter is operating
When A/D converter is stopped
When A/D converter is operating
6.1 12.2 mA
7.6 15.2
5.5 11.0 mA
14.0
3.0 6.0 mA
4.5 9.0
IDD2
Crystal/ceramic fX = 10 MHz
When peripheral functions are stopped
oscillation,
external clock
input HALT
mode^{Note 6}
VDD = 5.0 V ±10%^{Note 4}
fX = 6 MHz
VDD = 5.0 V ±10%^{Note 4}
When peripheral functions are operating
When peripheral functions are stopped
When peripheral functions are operating
1.7 3.8 mA
6.7
1.3 3.0 mA
6.0
fX = 5 MHz
VDD = 3.0 V ±10%^{Note 5}
When peripheral functions are stopped
When peripheral functions are operating
0.48 1 mA
2.1
I ^{Note 3}
DD3
High-speed
internal oscillation
operating
mode^{Note 7}
fX = 8 MHz
VDD = 5.0 V ±10%^{Note 4}
When A/D converter is stopped
When A/D converter is operating
5.0 10.0 mA
6.5 13.0
IDD4
High-speed
fX = 8 MHz
When peripheral functions are stopped
internal oscillation VDD = 5.0 V ±10%^{Note 4}
HALT mode^{Note 7}
When peripheral functions are operating
IDD5
STOP mode
VDD = 5.0 V ±10%
When low-speed internal oscillation
is stopped
1.4 3.2 mA
5.9
3.5 20.0 μA
VDD = 3.0 V ±10%
When low-speed internal oscillation
is operating
When low-speed internal oscillation
is stopped
17.5 32.0
3.5 15.5 μA
When low-speed internal oscillation
is operating
11.0 26.0
Notes 1.
2.
3.
4.
5.
6.
7.
Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on
clear (POC) circuit is 2.1 V ±0.1 V.
Total current flowing through the internal power supply (VDD). However, the current that flows through the
pull-up resistors of ports is not included.
IDD1 and IDD3 include peripheral operation current.
When the processor clock control register (PCC) is set to 00H.
When the processor clock control register (PCC) is set to 02H.
When crystal/ceramic oscillation clock, external clock input is selected as the system clock source using
the option byte.
When high-speed internal oscillation clock is selected as the system clock source using the option byte.
298
User’s Manual U18172EJ3V0UD