UPD78F9500MA-CAC-A Datasheet, PDF (161/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 9 A/D CONVERTER (μPD78F920x ONLY)
Figure 9-2 shows the block diagram of A/D converter.
Figure 9-2. Block Diagram of A/D Converter
ANI0/P20/TI000
TOH1
ANI1/P21/TI010/
TO00/INTP0
ANI2/X2/P22
ANI3/X1/P23
Sample & hold circuit
Voltage comparator
VSS
Successive
approximation
register (SAR)
VDD
D/A converter
VSS
Controller
A/D conversion result register
2
(ADCR, ADCRH)
3
ADS1
Analog input
channel specification
register (ADS)
ADS0
ADCS FR2 FR1 FR0 ADCE
A/D converter mode
register (ADM)
Internal bus
INTAD
Cautions 1. In μPD78F920x, VSS functions alternately as the ground potential of the A/D converter. Be
sure to connect VSS to a stabilized GND (= 0 V).
2. In μPD78F920x, VDD functions alternately as the A/D converter reference voltage input. When
using the A/D converter, stabilize VDD at the supply voltage used (2.7 to 5.5 V).
9.2 Configuration of A/D Converter
The A/D converter consists of the following hardware.
(1) ANI0 to ANI3 pins
These are the analog input pins of the 4-channel A/D converter. They input analog signals to be converted into
digital signals. Pins other than the one selected as the analog input pin by the analog input channel specification
register (ADS) can be used as I/O port pins.
(2) Sample & hold circuit
The sample & hold circuit samples the input signal of the analog input pin selected by the selector when A/D
conversion is started, and holds the sampled analog input voltage value during A/D conversion.
(3) D/A converter
The D/A converter is connected between VDD and VSS, and generates a voltage to be compared with the analog
input signal.
(4) Voltage comparator
The voltage comparator compares the sampled analog input voltage and the output voltage of the D/A converter.
User’s Manual U18172EJ3V0UD
159