UPD78F9500MA-CAC-A Datasheet, PDF (218/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 14 LOW-VOLTAGE DETECTOR
Figure 14-6. Example of Software Processing After Release of Reset (1/2)
• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
Reset
Initialization
processing <1>
LVI reset
Setting LVI
; Check reset source ^Note
Initialization of ports
Setting WDT
; The detection level is set with LVIS.
The low-voltage detector is operated (LVION = 1)
Setting 8-bit timer H1
(50 ms is measured)
; fXP = High-speed internal oscillation clock (8.4 MHz (MAX.)) /2² (default value)
Source : fRL (2.1 MHz (MAX.)) /2¹²,
51 ms when the compare value is 25
Timer starts (TMHE1 = 1)
Clears WDT
Detection voltage or more ^Yes
(LVIF = 0 ?)
No
LVIF = 0
; Clear low-voltage detection flag.
Restarting the timaer H1
(TMHE1 = 0 TMHE1 = 1)
; Clear timaer counter and timer starts.
No
50 ms has passed?
(TMIFH1 = 1?)
Yes
Initialization
processing <2>
; Specify the division ratio of the system clock,
setting Timaer, setting A/D Converter, etc.
Note
216
A flowchart is shown on the next page.
User’s Manual U18172EJ3V0UD