UPD78F9500MA-CAC-A Datasheet, PDF (160/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 9 A/D CONVERTER (μPD78F920x ONLY)
Table 9-1. Sampling Time and A/D Conversion Time
Reference
Voltage
Range^{Note 1}
Sampling
Time^{Note 2}
Conversion
Time^{Note 3}
fXP = 8 MHz
Sampling
Time^{Note 2}
Conversion
Time^{Note 3}
fXP = 10 MHz
FR2 FR1 FR0
Sampling
Time^{Note 2}
Conversion
Time^{Note 3}
VDD ≥ 4.5 V
VDD ≥ 4.0 V
VDD ≥ 2.85 V
12/fXP
24/fXP
96/fXP
48/fXP
48/fXP
24/fXP
36/fXP
72/fXP
144/fXP
96/fXP
72/fXP
48/fXP
VDD ≥ 2.7 V
176/fXP
88/fXP
224/fXP
112/fXP
1.5 μs
3.0 μs
12.0 μs
6.0 μs
6.0 μs
3.0 μs
22.0 μs
11.0 μs
4.5 μs
9.0 μs
18.0 μs
12.0 μs
9.0 μs
6.0 μs
28.0 μs
14.0 μs
1.2 μs
3.6 μs
0
0
0
2.4 μs
7.2 μs
1
0
0
9.6 μs
14.4 μs
1
1
0
4.8 μs
9.6 μs
1
0
1
4.8 μs
7.2 μs
0
1
0
Setting
Setting
0
0
1
prohibited^{Note 4} prohibited^{Note 4}
(2.4 μs)
(4.8 μs)
17.6 μs
22.4 μs
1
1
1
Setting
Setting
0
1
1
prohibited^{Note 4} prohibited^{Note 4}
(8.8 μs)
(11.2 μs)
Notes 1.
2.
3.
4.
Be sure to set the FR2, FR1, and FR0, in accordance with the reference voltage so that Notes 2 and 3
below are satisfied.
Example When VDD ≥ 2.7 V, fXP = 8 MHz
• The sampling time is 11.0 μs or more and the A/D conversion time is 14.0 μs or more and 100 μs or
less.
• Set FR2, FR1, and FR0 = 0, 1, 1 or 1, 1, 1.
Set the sampling time as follows.
• VDD ≥ 4.5 V:
1.0 μs or more
• VDD ≥ 4.0 V:
2.4 μs or more
• VDD ≥ 2.85 V:
3.0 μs or more
• VDD ≥ 2.7 V:
11.0 μs or more
Set the A/D conversion time as follows.
• VDD ≥ 4.5 V:
3.0 μs or more and less than 100 μs
• VDD ≥ 4.0 V:
4.8 μs or more and less than 100 μs
• VDD ≥ 2.85 V:
6.0 μs or more and less than 100 μs
• VDD ≥ 2.7 V:
14.0 μs or more and less than 100 μs
Setting is prohibited because the values do not satisfy the condition of Notes 2 or 3.
Caution The above sampling time and conversion time do not include the clock frequency error. Select
the sampling time and conversion time such that Notes 2 and 3 above are satisfied, while taking
the clock frequency error into consideration (an error margin maximum of ±5% when using the
high-speed internal oscillator).
Remarks 1.
2.
fXP: Oscillation frequency of clock to peripheral hardware
The conversion time refers to the total of the sampling time and the time from successively
comparing with the sampling value until the conversion result is output.
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User’s Manual U18172EJ3V0UD