UPD78F9500MA-CAC-A Datasheet, PDF (244/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 16 FLASH MEMORY
(5) Flash address pointers H and L (FLAPH and FLAPL)
These registers are used to specify the start address of the flash memory when the memory is erased, written,
or verified in the self-programming mode.
FLAPH and FLAPL consist of counters, and they are incremented until the values match with those of
FLAPHC and FLAPLC when the programming command is not executed. When the programming command
is executed, therefore, set the value again.
These registers are set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation makes these registers undefined.
Figure 16-14. Format of Flash Address Pointer H/L (FLAPH/FLAPL)
Address: FFA4H, FFA5H After reset: Undefined R/W
FLAPH (FFA5H)
FLAPL (FFA4H)
0 0 0 0 FLA FLA FLA FLA FLA FLA FLA FLA FLA FLA FLA FLA
P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0
Caution Be sure to clear bits 4 to 7 of FLAPH and FLAPHC to 0 before executing the self
programming command. If the self programming command is executed with these bits
set to 1, the device may malfunction.
(6) Flash address pointer H compare register and flash address pointer L compare register (FLAPHC and
FLAPLC)
These registers are used to specify the address range in which the internal sequencer operates when the flash
memory is verified in the self-programming mode.
Set FLAPHC to the same value as that of FLAPH. Set the last address of the range in which verification is to
be executed to FLAPLC.
These registers are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Figure 16-15. Format of Flash Address Pointer H/L Compare Registers (FLAPHC/FLAPLC)
Address: FFA6H, FFA7H After reset: 00H R/W
FLAPHC (FFA6H)
FLAPLC (FFA7H)
0 0 0 0 FLAP FLAP FLAP FLAP FLAP FLAP FLAP FLAP FLAP FLAP FLAP FLAP
C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0
Cautions 1. Be sure to clear bits 4 to 7 of FLAPH and FLAPHC to 0 before executing the self
programming command. If the self programming command is executed with these bits
set to 1, the device may malfunction.
2. Set the number of the block subject to a block erase, verify, or blank check (same
value as FLAPH) to FLAPHC.
3. Clear FLAPLC to 00H when a block erase is performed, and set this register to FFH
when a blank check is performed.
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User’s Manual U18172EJ3V0UD