UPD78F9500MA-CAC-A Datasheet, PDF (166/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 9 A/D CONVERTER (μPD78F920x ONLY)
(2) Analog input channel specification register (ADS)
This register specifies the input port of the analog voltage to be A/D converted.
ADS can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 9-5. Format of Analog Input Channel Specification Register (ADS)
Address: FF81H After reset: 00H R/W
Symbol 7
6
5
4
3
ADS 0
0
0
0
0
2
1
0
0
ADS1 ADS0
ADS1
0
0
1
1
ADS0
0
1
0
1
ANI0
ANI1
ANI2
ANI3
Analog input channel specification
Caution Be sure to clear bits 2 to 7 of ADS to 0.
(3) 10-bit A/D conversion result register (ADCR)
This register is a 16-bit register that stores the A/D conversion result. The higher six bits are fixed to 0. Each
time A/D conversion ends, the conversion result is loaded from the successive approximation register, and is
stored in ADCR in order starting from bit 1 of FF19H. FF19H indicates the higher 2 bits of the conversion result,
and FF18H indicates the lower 8 bits of the conversion result.
ADCR can be read by a 16-bit memory manipulation instruction.
Reset signal generation makes ADCR undefined.
Figure 9-6. Format of 10-Bit A/D Conversion Result Register (ADCR)
Address: FF18H, FF19H After reset: Undefined R
Symbol
FF19H
FF18H
ADCR 0
0
0
0
0
0
Caution When writing to the A/D converter mode register (ADM) and analog input channel
specification register (ADS), the contents of ADCR may become undefined. Read the
conversion result following conversion completion before writing to ADM and ADS.
Using timing other than the above may cause an incorrect conversion result to be read.
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User’s Manual U18172EJ3V0UD