UPD78F9500MA-CAC-A Datasheet, PDF (77/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

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(2) μPD78F950x
CHAPTER 5 CLOCK GENERATORS
Figure 5-1. Block Diagram of Clock Generators (2/2)
Internal bus
Preprocessor clock
control register (PPCC)
Processor clock
control register (PCC)
PPCC1 PPCC0
PCC1
EXCLK/P23
STOP
System clock
oscillator^Note
External clock
input
fX
High-speed
internal
oscillation
Watchdog timer
Prescaler
fX
fX
2
2²
fXP
2²
fXP
Prescaler
Low-speed _fRL
internal
oscillator
Clock to peripheral
hardware (fXP)
8-bit timer H1,
watchdog timer
CPU clock
(fCPU)
Option byte
1: Cannot be stopped.
0: Can be stopped.
LSRSTOP
Low-speed internal oscillation
mode register (LSRCM)
Internal bus
Note Select the high-speed internal oscillator or external clock input circuit as the system clock source by using
the option byte.
User’s Manual U18172EJ3V0UD
75