UPD78F9500MA-CAC-A Datasheet, PDF (195/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 11 STANDBY FUNCTION
(2) STOP mode release
Figure 11-4. Operation Timing When STOP Mode Is Released
<1> If high-speed internal oscillation clock or external input clock is selected as system clock to be supplied
STOP mode
is released.
STOP mode
System clock
oscillation
<R>
CPU clock
Operation
stops^Note.
High-speed internal oscillation clock or external clock input
<2> If crystal/ceramic oscillation clock is selected as system clock to be supplied (μPD78F920x only)
STOP mode
is released.
STOP mode
System clock
oscillation
CPU clock
Operation
stops^Note.
HALT status
(oscillation stabilization time set by OSTS)
Crystal/ceramic oscillation clock
Note The operation stop time is 17 μs (MIN.), 34 μs (TYP.), and 67 μs (MAX.).
The STOP mode can be released by the following two sources.
User’s Manual U18172EJ3V0UD
193