UPD78F9500MA-CAC-A Datasheet, PDF (217/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 14 LOW-VOLTAGE DETECTOR
14.5 Cautions for Low-Voltage Detector
In a system where the supply voltage (VDD) fluctuates for a certain period in the vicinity of the LVI detection voltage
(VLVI), the operation is as follows depending on how the low-voltage detector is used.
<1> When used as reset
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the microcontroller can be arbitrarily
set by taking action (1) below.
<2> When used as interrupt
Interrupt requests may be frequently generated. Take (b) of action (2) below.
In this system, take the following actions.
<Action>
(1) When used as reset
After releasing the reset signal, wait for the supply voltage fluctuation period of each system by means of a
software counter that uses a timer, and then initialize the ports (see Figure 14-6).
(2) When used as interrupt
(a) Perform the processing^Note for low voltage detection. Check that “supply voltage (VDD) ≥ detection voltage
(VLVI)” in the servicing routine of the LVI interrupt by using bit 0 (LVIF) of the low-voltage detection register
(LVIM). Clear bit 1 (LVIIF) of interrupt request flag register 0 (IF0) to 0.
(b) In a system where the supply voltage fluctuation period is long in the vicinity of the LVI detection voltage, wait
for the supply voltage fluctuation period, check that “supply voltage (VDD) ≥ detection voltage (VLVI)” using the
LVIF flag and clear LVIIF flag to 0.
Note For low voltage detection processing, the CPU clock speed is switched to slow speed and the A/D
converter is stopped, etc.
User’s Manual U18172EJ3V0UD
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