UPD78F9500MA-CAC-A Datasheet, PDF (181/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

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CHAPTER 10 INTERRUPT FUNCTIONS
Table 10-2. Interrupt Request Signals and Corresponding Flags
Interrupt Request Signal
INTLVI
INTP0
INTP1
INTTMH1
INTTM000^Note
INTTM010^Note
INTAD^Note
Interrupt Request Flag
LVIIF
PIF0
PIF1
TMIFH1
TMIF000^Note
TMIF010^Note
ADIF^Note
Interrupt Mask Flag
LVIMK
PMK0
PMK1
TMMKH1
TMMK000^Note
TMMK010^Note
ADMK^Note
Note μPD78F920x only
(1) Interrupt request flag register 0 (IF0)
An interrupt request flag is set to 1 when the corresponding interrupt request is issued, or when the instruction is
executed. It is cleared to 0 by executing an instruction when the interrupt request is acknowledged or when a
reset signal is input.
IF0 is set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears IF0 to 00H.
Figure 10-2. Format of Interrupt Request Flag Register 0 (IF0)
Address: FFE0H After reset: 00H R/W
Symbol <7>
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<5>
<4>
<3>
<2>
<1>
0
IF0
ADIF TMIF010 TMIF000 TMIFH1 PIF1
PIF0
LVIIF
0
Note
Note
Note
××IF×
0
1
Interrupt request flag
No interrupt request signal has been issued.
An interrupt request signal has been issued; an interrupt request status.
Note μPD78F920x only
Caution Because P21 and P32 have an alternate function as external interrupt inputs, when the
output level is changed by specifying the output mode of the port function, an interrupt
request flag is set. Therefore, the interrupt mask flag should be set to 1 before using the
output mode.
User’s Manual U18172EJ3V0UD
179