UPD78F9500MA-CAC-A Datasheet, PDF (189/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 11 STANDBY FUNCTION
(2) STOP mode
STOP instruction execution sets the STOP mode. In the STOP mode, the system clock oscillator stops,
stopping the whole system, thereby considerably reducing the CPU operating current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out.
However, select the HALT mode if processing must be immediately started by an interrupt request when the
operation stop time^Note is generated after the STOP mode is released (because an additional wait time for
stabilizing oscillation elapses when crystal/ceramic oscillation is used).
Note The operation stop time is 17 μs (MIN.), 34 μs (TYP.), and 67 μs (MAX.).
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is
set are held. The I/O port output latches and output buffer statuses are also held.
Cautions 1. When shifting to the STOP mode, be sure to stop the peripheral hardware operation before
executing STOP instruction (except the peripheral hardware that operates on the low-speed
internal oscillation clock).
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2. The following sequence is recommended for operating current reduction of the A/D converter
in μPD78F920x when the standby function is used: First clear bit 7 (ADCS) and bit 0 (ADCE)
of the A/D converter mode register (ADM) to 0 to stop the A/D conversion operation, and then
execute the HALT or STOP instruction.
3. If the low-speed internal oscillator is operating before the STOP mode is set, oscillation of the
low-speed internal oscillation clock cannot be stopped in the STOP mode (refer to Table 11-1).
User’s Manual U18172EJ3V0UD
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