UPD78F9500MA-CAC-A Datasheet, PDF (104/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00 (μPD78F920x ONLY)
Figure 6-11. Control Register Settings for Interval Timer Operation
(a) 16-bit timer mode control register 00 (CRC00)
7
6
5
4
3 CRC002 CRC001 CRC000
CRC00 0
0
0
0
0 0/1 0/1 0
CR000 used as compare register
(b) Prescaler mode register 00 (PRM00)
ES110 ES100 ES010 ES000 3
PRM00 0/1 0/1 0/1 0/1 0
2 PRM001 PRM000
0 0/1 0/1
Selects count clock.
Setting invalid (setting “10” is prohibited.)
Setting invalid (setting “10” is prohibited.)
(c) 16-bit timer mode control register 00 (TMC00)
7
6
5
4 TMC003 TMC002 TMC001 OVF00
TMC00 0
0
0
0
1
1 0/1 0
Clears and starts on match between TM00 and CR000.
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with the interval timer. See the
description of the respective control registers for details.
Figure 6-12. Interval Timer Configuration Diagram
16-bit timer capture/compare
register 000 (CR000)
fXP
fXP/2²
fXP/2⁸
TI000/ANI0/
TOH1/P20
Noise
eliminator
fXP
16-bit timer counter 00
(TM00)
INTTM000
Note
OVF00
Clear
circuit
Note OVF00 is set to 1 only when 16-bit timer capture/compare register 000 (CR000) is set to FFFFH.
102
User’s Manual U18172EJ3V0UD