UPD78F9500MA-CAC-A Datasheet, PDF (174/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 9 A/D CONVERTER (μPD78F920x ONLY)
(5) Full-scale error
This shows the difference between the actual measurement value of the analog input voltage and the theoretical
value (Full-scale − 3/2LSB) when the digital output changes from 1......110 to 1......111.
(6) Integral linearity error
This shows the degree to which the conversion characteristics deviate from the ideal linear relationship. It
expresses the maximum value of the difference between the actual measurement value and the ideal straight line
when the zero-scale error and full-scale error are 0.
(7) Differential linearity error
While the ideal width of code output is 1LSB, this indicates the difference between the actual measurement value
and the ideal value.
Figure 9-15. Zero-Scale Error
111
Ideal line
011
010
Figure 9-16. Full-Scale Error
Full-scale error
111
110
001
000
0
Zero-scale error
1
2
3
VDD
Analog input (LSB)
Figure 9-17. Integral Linearity Error
1……1
Ideal line
101
Ideal line
000
0
VDD−3 VDD−2 VDD−1
VDD
Analog input (LSB)
Figure 9-18. Differential Linearity Error
1……1
Ideal 1LSB width
0……0
0
Integral linearity
error
VDD
Analog input
0……0
0
Differential
linearity error
VDD
Analog input
(8) Conversion time
This expresses the time from the start of sampling to when the digital output is obtained.
The sampling time is included in the conversion time in the characteristics table.
(9) Sampling time
This is the time the analog switch is turned on for the analog voltage to be sampled by the sample & hold circuit.
172
Sampling
time
Conversion time
User’s Manual U18172EJ3V0UD