UPD78F9500MA-CAC-A Datasheet, PDF (194/342 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcontrollers

CHAPTER 11 STANDBY FUNCTION
11.2.2 STOP mode
(1) STOP mode setting and operating statuses
The STOP mode is set by executing the STOP instruction.
Caution Because an interrupt request signal is used to clear the standby mode, if there is an interrupt
source with the interrupt request flag set and the interrupt mask flag reset, the standby
mode is immediately cleared if set. Thus, in the STOP mode, the normal operation mode is
restored after the STOP instruction is executed and then the operation is stopped for the
duration of 34 μs (TYP.) (after an additional wait time for stabilizing oscillation set by the
oscillation stabilization time select register (OSTS) has elapsed when crystal/ceramic
oscillation is used).
The operating statuses in the STOP mode are shown below.
Table 11-4. Operating Statuses in STOP Mode
Item
Setting of STOP Mode
Low-Speed Internal
Oscillator cannot be
stopped ^{Note 1}.
Low-Speed Internal Oscillator can be stopped ^{Note 1}.
When Low-Speed Internal When Low-Speed Internal
Oscillation Continues
Oscillation Stops
System clock
Oscillation stops.
CPU
Operation stops.
Port (latch)
Holds status before STOP mode was set.
16-bit timer/event counter 00 ^{Note 2}
Operation stops.
8-bit timer Sets count clock to fXP to fXP/2¹²
H1
Sets count clock to fRL/2⁷
Operation stops.
Operable
Operable
Operation stops.
Watchdog “System clock” selected as
timer
operating clock
Setting disabled.
Operation stops.
“Low-speed internal oscillation
clock” selected as operating
clock
A/D converter ^{Note 2}
Operable
(Operation continues)
Operation stops.
Operation stops.
Power-on-clear circuit
Always operates.
Low-voltage detector
Operable
External interrupt
Operable
Notes 1. “Cannot be stopped” or “Stopped by software” is selected for low-speed internal oscillator by the option byte
(for the option byte, see CHAPTER 15 OPTION BYTE).
<R>
2. μPD78F920x only
192
User’s Manual U18172EJ3V0UD