M16C30P_07 Datasheet, PDF (93/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
11. Interrupt
11.9 Address Match Interrupt
An address match interrupt request is generated immediately before executing the instruction at the address
indicated by the RMADi register (i=0 to 1). Set the start address of any instruction in the RMADi register. Use the
AIER0 and AIER1 bits in the AIER register to enable or disable the interrupt. Note that the address match interrupt
is unaffected by the I flag and IPL. For address match interrupts, the value of the PC that is saved to the stack area
varies depending on the instruction being executed (refer to 11.5.7 Saving Registers).
(The value of the PC that is saved to the stack area is not the correct return address.) Therefore, follow one of the
methods described below to return from the address match interrupt.
• Rewrite the content of the stack and then use the REIT instruction to return.
• Restore the stack to its previous state before the interrupt request was accepted by using the POP or similar
other instruction and then use a jump instruction to return.
Table 11.6 shows the Value of the PC that is Saved to the Stack Area when an Address Match Interrupt Request is
Accepted
The address match interrupt is not available for an external space when an 8-bit wide external data bus is used.
Figure 11.13 shows the AIER and RMAD0 to RMAD1 Registers.
Table 11.6 Value of the PC that is Saved to the Stack Area when an Address Match Interrupt
Request is Accepted
Instruction at the Address Indicated by the RMADi Register
• 16-bit op-code instruction
• Instruction shown below among 8-bit operation code instructions
ADD.B:S #IMM8,dest SUB.B:S #IMM8,dest
OR.B:S #IMM8,dest MOV.B:S #IMM8,dest
AND.B:S
STZ.B:S
STNZ.B:S #IMM8,dest
CMP.B:S #IMM8,dest
JMPS
#IMM8
STZX.B:S
PUSHM
JSRS
#IMM81,#IMM82,dest
src
POPM dest
#IMM8
MOV.B:S #IMM,dest (However, dest=A0 or A1)
Instructions other than the above
#IMM8,dest
#IMM8,dest
Value of the PC that is
saved to the stack area
The address
indicated by the
RMADi register +2
The address
indicated by the
RMADi register +1
Value of the PC that is saved to the stack area : Refer to 11.5.7 Saving Registers.
Table 11.7 Relationship Between Address Match Interrupt Sources and Associated Registers
Address Match Interrupt sources
Address Match Interrupt 0
Address Match Interrupt 1
Address Match Interrupt Enable Bit
AIER0
AIER1
Address Match Interrupt Register
RMAD0
RMAD1
Rev.1.22 Mar 29, 2007 Page 77 of 291
REJ09B0179-0122