M16C30P_07 Datasheet, PDF (138/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
15. Serial Interface
RXDi
RXD data
reverse circuit
STPS
1SP
0
SP
SP
1
2SP
IOPOL
No reverse
0
1
Reverse
PRYE
PAR
disabled
0
PAR
1
PAR
enabled
Clock
synchronous
type
0
1
UART
SMD2 to SMD0
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
0
UART(7 bits)
0
1
UART
(9 bits)
1
Clock
synchronous type
UART
(8 bits)
UART
(9 bits)
UARTi receive register
0 0 0 0 0 0 0 D8
D7 D6 D5 D4 D3 D2 D1 D0 UiRB register
Logic reverse circuit + MSB/LSB conversion circuit
Data bus high-order bits
Data bus low-order bits
Logic reverse circuit + MSB/LSB conversion circuit
D8
D7 D6 D5 D4 D3 D2 D1 D0 UiTB register
UART
(8 bits)
UART
(9 bits)
STPS
2SP
1
PRYE
PAR
enabled
1
SMD2 to SMD0
UART
1
UART
(9 bits)
1
Clock
synchronous type
1
SP
SP
PAR
0
0
1SP
0
PAR
disabled
Clock
synchronous
type
0
UART
(7 bits)
UART
(8 bits)
Clock
synchronous type
0
UART(7 bits)
UARTi transmit register
Error signal output
disable
0
IOPOL No reverse
0
i=0 to 2
SP: Stop bit
PAR: Parity bit
SMD2 to SMD0, STPS, PRYE, IOPOL, CKDIR: Bits in UiMR register
UiERE: Bit in UiC1 register
Error signal
UiERE ^{1 output circuit}
Error signal output
enable
TXD data
1 ^{reverse circuit}
Reverse
TXDi
Figure 15.4 UARTi Transmit/Receive Unit
Rev.1.22 Mar 29, 2007 Page 122 of 291
REJ09B0179-0122