M16C30P_07 Datasheet, PDF (314/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

REVISION HISTORY
M16C/30P Group Hardware Manual
Rev.
1.21
Date
Page
Description
Summary
241 _{Table 20.25 Electrical Characteristics (1) is partly revised.}
242 _{Table 20.26 Electrical Characteristics (2) is partly revised.}
246 _{Table 20.41 Memory Expansion and Microprocessor Modes}
(for setting with no wait) is partly revised.
247 Table 20.42 Memory Expansion and Microprocessor Modes
(for 1 wait setting and external area access) is partly revised.
253 21.1 SFR, 21.1.1 Register Settings, and Table 21.1 Registers with Write-
only Bits is added.
255 21.3 Bus information is added.
267 Figure 21.3 Use of Capacitors to Reduce Noise is partly revised.
269 21.12 Electric Characteristic Differences Between Mask ROM and Flash
Memory Version Microcomputers information is added.
270-272 21.14 Flash Memory Version information is added.
Jan 24, 2007
All chapters Added the contents relevant to one-time flash to body texts, tables, and
diagrams to all chapters.
Deleted Erase all unlock block command in all chapters.
Type No. Æ Part No.
2 Table 1.1 Performance Outline of M16C/30P Group is partly revised.
4 Table 1.2 Product List is partly revised.
17 Figure 3.1 Memory Map is partly revised.
32 Figure 6.3 PM1 Register (2) (M30304GDPFP, M30304GDPGP, M30304GEPFP,
M30304GEPGP, M30302GGPFP, M30302GGPGP) is partly revised.
33 Figure 6.4 Memory Map in Single Chip Mode is partly revised.
43 8. Memory Space Expansion Function
Figure 8.1 Memory Mapping and CS Area in 1-Mbyte mode (PM13=0) is
partly revised.
44 Figure 8.2 Memory Mapping and CS Area in 1-Mbyte mode (PM13=1) is
partly revised.
130 Table 15.1 Clock Synchronous Serial I/O Mode Specifications is partly revised.
138 Table 15.5 UART Mode Specifications is partly revised.
146 Table 15.10 I²C Mode Specifications is partly revised.
148 Table 15.11 Registers to Be Used and Settings in I2C Mode (1) is partly revised.
156 Table 15.15 Special Mode 2 Specifications is partly revised.
163 Table 15.18 SIM Mode Specifications is partly revised.
197 Figure 19.1 Flash Memory Block Diagram
199 19.2.2 ID Code Check Function, Table 19.3 Reserved Character
Sequence (Reserved Word) is added.
200 19.2.3 Forced Erase Function, Table 19.4 Forced Erase Function is added.
229 Chapter 20. One Time Flash Version is added.
241 Table 21.4 Flash Memory Version Electrical Characteristics (1) is partly revised.
285 22.14.4 Low power dissipation mode is partly added.
290 Appendix Table 2.1 Function Difference (1) is partly added.
291 Appendix Table 2.2 Function Difference (2) is partly added.
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