M16C30P_07 Datasheet, PDF (308/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

REVISION HISTORY
M16C/30P Group Hardware Manual
Rev.
0.70
0.80
Date
Aug 26, 2004
Mar 18, 2005
Description
Page
Summary
− First Edition issued
− development support tools -> development tools
− BCLK -> CPU clock
2 Table 1.1 Performance Outline of M16C/30P Group
Serial interface is revised.
4 Figure 1.2 Type., Memory Size, and Package is partly revised.
8 Table 1.4 Pin Detection (2) is partly revised.
18 5.1 Hardware Reset 1 -> 5.1 Hardware Reset
21 6.1 Types of Processor Modes is revised.
25 Figure 7.1 Clock Generation Circuit is partly revised.
26 Note 3 of Figure 7.2 CM0 Register is revised.
30 Tittle of 7.2.1 CPU Clock and BCLK is revised.
31 7.4.1 Normal Operation Mode is partly revised.
33 Table 7.4 Interrupts to Exit Wait Mode is partly revised.
57 Figure 10.1 Watchdog Timer Block Diagram is partly revised.
59 Figure 10.3 Typical Operation of Cold start / Warm start is revised.
63 Figure 11.3 DM1SL Register is partly revised.
71 Figure 12.1 Timer A Configuration is revised.
73 Figure 12.3 Timer A Block Diagram is revised.
83 Table 12.4 Specifications in One-shot Timer Mode is revised.
85 Table 12.5 Specifications in PWM Mode is revised.
88 Figure 12.14 Timer B Block Diagram is partly revised.
92 Table 12.7 Specifications in Event Counter Mode is partly revised.
93 Figure 12.18 TBiMR Register in Event counter Mode is partly revised.
95 Figure 12.19 TBiMR Register in Pulse Period and Pulse Width
Measurement Mode is partly revised.
96 Figure 12.20 Operation Timing when Measuring a Pulse Period is partly
revised.
Figure 12.21 Operation Timing when Measuring a Pulse Width is partly
revised.
108 Table 13.1 Clock Synchronous Serial I/O Mode Specifications is partly
revised.
111 Figure 13.12 Transmit and Receive Operation is partly revised.
112 13.1.1.1 Counter Measure for Communication Error Occurs is partly
revised.
120 13.1.2.1 Bit Rate is partly revised.
Table 13.9 Example of Rates and Settings is revised.
124 Table 13.10 I²C Mode Specifications is partly revised.
134 Table 13.15 Special Mode 2 Specifications is partly revised.
141 Table 13.18 SIM Mode Specifications is partly revised.
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