M16C30P_07 Datasheet, PDF (198/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
18. Programmable I/O Ports
18. Programmable I/O Ports
The programmable input/output ports (hereafter referred to simply as I/O ports) consist of 87 lines P0 to P10 (except
P8_5) for the 100-pin version. Each port can be set for input or output every line by using a direction register, and can
also be chosen to be or not be pulled high every 4 lines. P8_5 is an input-only port and does not have a pull-up resistor.
Port P8_5 shares the pin with NMI, so that the NMI input level can be read from the P8 register P8_5 bit.
Figures 18.1 to 18.5 show the I/O ports. Figure 18.6 shows the I/O Pins.
Each pin functions as an I/O port, a peripheral function input/output, or a bus control pin.
For details on how to set peripheral functions, refer to each functional description in this manual. If any pin is used as
a peripheral function input, set the direction bit for that pin to “0” (input mode). Any pin used as an output pin for
peripheral functions output, no matter how the corresponding direction bit is set.
When using any pin as a bus control pin, refer to 7.2 Bus Control.
18.1 Port Pi Direction Register (PDi Register, i = 0 to 10)
Figure 18.7 shows the PDi Registers.
This register selects whether the I/O port is to be used for input or output. The bits in this register correspond one
for one to each port.
During memory extension and microprocessor modes, the PDi registers for the pins functioning as bus control pins
(A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA, and BCLK) cannot
be modified.
No direction register bit for P8_5 is available.
18.2 Port Pi Register (Pi Register, i = 0 to 10)
Figure 18.8 shows the Pi Registers.
Data input/output to and from external devices are accomplished by reading and writing to the Pi register.
The Pi register consists of a port latch to hold the input/output data and a circuit to read the pin status. For ports set
for input mode, the input level of the pin can be read by reading the corresponding Pi register, and data can be
written to the port latch by writing to the Pi register.
For ports set for output mode, the port latch can be read by reading the corresponding Pi register, and data can be
written to the port latch by writing to the Pi register. The data written to the port latch is output from the pin. The
bits in the Pi register correspond one for one to each port.
During memory extension and microprocessor modes, the Pi registers for the pins functioning as bus control pins
(A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA, and BCLK) cannot
be modified.
18.3 Pull-up Control Register 0 to Pull-up Control Register 2 (PUR0 to PUR2
Registers)
Figure 18.9 and Figure 18.10 show the PUR0 to PUR2 Registers.
The PUR0 to PUR2 registers bits can be used to select whether or not to pull the corresponding port high in 4 bit
units. The port chosen to be pulled high has a pull-up resistor connected to it when the direction bit is set for input
mode.
However, the pull-up control register has no effect on P0 to P3, P4_0 to P4_3, and P5 during memory extension
and microprocessor modes. Although the register contents can be modified, no pull-up resistors are connected.
18.4 Port Control Register (PCR Register)
Figure 18.10 shows the PCR Register.
When the P1 register is read after setting the PCR0 bit in the PCR register to “1”, the corresponding port latch can
be read no matter how the PD1 register is set.
Rev.1.22 Mar 29, 2007 Page 182 of 291
REJ09B0179-0122