M16C30P_07 Datasheet, PDF (62/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
9. Clock Generating Circuit
Sub clock
generating circuit
XCIN
XCOUT
CM04
CM10=1(stop mode)
WAIT instruction
SQ
R
XIN XOUT
Main clock
generating circuit
CM05
SQ
R
RESET
Software reset
NMI
Interrupt request level judgment output
CM02, CM04, CM05, CM06, CM07: Bits in CM0 register
CM10, CM16, CM17: Bits in CM1 register
PCLK0, PCLK1: Bits in PCLKR register
Sub clock
Main clock
CM02
I/O ports
CM01_CM00=00b
PM01_PM00=00b, CM01_CM00=01b
PM01_PM00=00b, CM01_CM00=10b
1/32
fC32
f1
PCLK0=1
f2
PCLK0=0
fC
f8
CLKOUT
PM01_PM00=00b,
CM01_CM00=11b
f32
fAD
f1SIO
f2SIO
PCLK1=1
PCLK1=0
f8SIO
eb c
a _Divider d
f32SIO
CM07=0
fC
CM07=1
CPU clock
BCLK
e
b
c
a
1/2
1/2
1/2
1/2
1/2
1/32
1/2
1/4
1/8
1/16
CM06=1
CM06=0
CM17_CM16=10b
CM06=0
CM17_CM16=11b
d
CM06=0
CM17_CM16=01b
CM06=0
CM17_CM16=00b
Details of divider
Figure 9.1 Clock Generation Circuit
Rev.1.22 Mar 29, 2007 Page 46 of 291
REJ09B0179-0122