M16C30P_07 Datasheet, PDF (187/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
16. A/D Converter
A/D Control Register 2 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
Address
After Reset
ADCON2
03D4h
XXX00000b
Bit Symbol
Bit Name
Function
RW
A/D Conversion Method Select 0 : Without sample and hold
SMP _Bit
1 : With sample and hold
RW
—
Nothing is assigned.
(b1) When w rite, set to “0”. When read, its content is indeterminate.
—
A/D Input Group Select Bit
0 : Port P10 group is selected
ADGSEL1
1 : Port P0 group is selected
RW
—
Reserved Bit
Set to “0”
(b3)
RW
Frequency Select Bit 2 ⁽²⁾
0: Selects fAD, fAD divided by 2, or fAD
CKS2
divided by 4.
1: Selects fAD divided by 3, fAD divided
RW
by 6, or fAD divided by 12.
—
Nothing is assigned.
(b7-b5) When w rite, set to “0”. When read, their contents are “0”.
—
NOTES :
1. If the ADCON2 register is rew ritten during A/D conversion, the conversion result w ill be indeterminate.
2. The ØAD frequency must be 10 MHz or less. The selected ØAD frequency is determined by a combination of the
CKS0 bit in the ADCON0 register, the CKS1 bit in the ADCON1 register, and the CKS2 bit in the ADCON2 register.
CKS2
0
0
0
0
1
1
1
1
CKS1
0
0
1
1
0
0
1
1
CKS0
0
1
0
1
0
1
0
1
ØAD
Divide-by-4 of fAD
Divide-by-2 of fAD
fAD
Ddivide-by-12 of fAD
Divide-by-6 of fAD
Divide-by-3 of fAD
A/D Register i (i=0 to 7)
(b15)
b7
(b8)
b0 b7
Symbol
AD0
AD1
AD2
AD3
AD4
AD5
AD6
b0
AD7
Address
03C1h to 03C0h
03C3h to 03C2h
03C5h to 03C4h
03C7h to 03C6h
03C9h to 03C8h
03CBh to 03CAh
03CDh to 03CCh
03CFh to 03CEh
After Reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Function
RW
When the BITS bit in the ADCON1
register is “1” (10-bit mode)
When the BITS bit is “0”
(8-bit mode)
RW
Eight low -order bits of A/D conversion A/D conversion result
result
RO
Tw o high-order bits of A/D conversion When read, the content is indeterminate
result
RO
Nothing is assigned.
When w rite, set to “0”. When read, their contents are “0”.
—
Figure 16.3 ADCON2 and AD0 to AD7 Registers
Rev.1.22 Mar 29, 2007 Page 171 of 291
REJ09B0179-0122