M16C30P_07 Datasheet, PDF (309/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

REVISION HISTORY
M16C/30P Group Hardware Manual
Rev.
1.00
Date
Sep 01, 2005
Description
Page
Summary
146 Table 14.1 Performance of A/D Converter is revised.
148 ADCON1 Register of Figure 14.2 ADCON0 to ADCON1 Registers is partly
revised.
149 ADCON2 Register of Figure 14.3 ADCON2 and AD0 to AD7 Registers is
partly revised.
152 Figure 14.5 ADCON1 Register (One-shot Mode) is partly revised.
155 Figure 14.7 ADCON1 Register (Repeat Mode) is partly revised.
158 Figure 14.8 Analog Input Pin and External Sensor Equivalent Circuit is
partly revised.
167 Figure 16.7 PDi Registers is partly revised.
174 Note 2 Table 17.3 A/D Conversion Characteristics is partly revised.
175 Symbol of Table 17.4 Power Supply Circuit Timing Characteristics is
partly revised.
176 Table 17.5 Electrical Characteristics is revised.
182 Table 17.19 Electrical Characteristics is revised.
189 A/D converter of 18.2 Precautions for Power Control is partly revised.
191 Note 2 of Figure 18.2 Procedure for Changing the Interrupt Generate
Factor is partly revised.
199 18.8 Precautions for A/D Converter is partly revised.
200 18.8 Precautions for A/D Converter is partly revised.
203- Appendix 2. Difference between M16C/62P and M16C/30P is added.
204
2 Table 1.1 Performance Outline of M16C/30P Group is partly revised.
4 Table 1.2 Product List is partly revised.
Figure 1.2 Type No., Memory Size, and Package is partly revised.
5 Figure 1.3 Pin Configuration is partly revised.
6 Figure 1.4 Pin Configuration is partly revised.
7-8 Tables 1.3 to 1.4 Pin Characteristics are added.
9 Table 1.5 Pin Description is revised.
14 3. Memory is partly revised.
15 Table 4.1 SFR Information is partly revised.
19 Table 4.5 SFR Information is partly revised
20-23 Change Sections in Chapter 5.
21 Figure 5.2 Reset Sequence is revised.
22 Table 5.1 Pin Status When RESET Pin Level is “L” is revised.
25-26 5.4 Cold Start-up / Warm Start-up Determine Function is added.
27-30 6. Processor Mode is revised.
31-39 7. Bus is Added.
40 8. Memory Space Expansion Function is added.
45 Figure 9.5 Example of Main Clock Connection Circuit is partly revised.
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