M16C30P_07 Datasheet, PDF (219/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
19. Flash Memory Version
Flash Memory Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
Address
FMR0
01B7h
After Reset
00000001b
Bit Symbol
Bit Name
Function
RW
___
FMR00 ^{RY/BY Status Flag}
0 : Busy (being w ritten or erased)
1 : Ready
RO
CPU Rew rite Mode Select
0 : Disables CPU rew rite mode
FMR01 _{Bit (1)}
1 : Enables CPU rew rite mode
RW
Lock Bit Disable Select Bit ⁽²⁾ 0 : Enables lock bit
FMR02
1 : Disables lock bit
RW
Flash Memory Stop Bit ^{(3, 5)}
0 : Enables flash memory operation
FMSTP
1 : Stops flash memory operation
(placed in low pow er mode, flash memory
RW
initialized)
—
Reserved Bit
Set to “0”
(b4)
RW
User ROM Area Select Bit ⁽³⁾ 0 : Boot ROM area is accessed
FMR05 _{(Effective in Only Boot Mode) 1 : User ROM area is accessed}
RW
Program Status Flag ⁽⁴⁾
0 : Terminated normally
FMR06
1 : Terminated in error
RO
FMR07 ^{Erase Status Flag (4)}
0 : Terminated normally
1 : Terminated in error
RO
NOTES :
1. To set this bit to “1,” w rite “0” and then “1” in succession. Make sure no interrupts or DMA transfers w ill occur
before w riting “1” after w riting “0”.
____
Write to this bit w hen the NMI pin is in the high state. Also, w hile in EW0 mode, w rite to this bit from a program in
than the flash memory.
Enter read array mode and set this bit to “0”.
2. To set this bit to “1,” w rite “0” and then “1” in succession w hen the FMR01 bit = 1. Make sure no interrupts or no
DMA transfers w ill occur _{_}b_{_}e_{__}fore w riting “1” after w riting “0”.
Write to this bit w hen the NMI pin is in the high state.
3. Write to this bit from a program in other than the flash memory.
4. This flag is cleared to “0” by executing the Clear Status command.
5. Effective w hen the FMR01 bit = 1 (CPU rew rite mode). If the FMR01 bit = 0, although the FMR03 bit can be set to “1”
by w riting “1” in a program, the flash memory is neither placed in low pow er mode nor initialized.
6. This status includes w riting or reading w ith the Lock Bit Program or Read Lock Bit Status command.
Figure 19.4 FMR0 Register
Rev.1.22 Mar 29, 2007 Page 203 of 291
REJ09B0179-0122