M16C30P_07 Datasheet, PDF (134/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
14. Timers
Count source
“H”
Measurement pulse
“L”
Reload register counter
transfer timing
Timing at which counter
reaches “0000h”
“1”
TBiS bit
“0”
Transfer
(indeterminate value)
Transfer
(measured value)
(NOTE 1)
(NOTE 1)
(NOTE 2)
IR bit in TBiIC
“1”
register
“0”
MR3 bit in TBiMR
“1”
register
“0”
Set to “0” upon accepting an interrupt request or by writing in
program
i = 0 to 2
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
NOTES :
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are “00b” (measure the
interval from falling edge to falling edge of the measurement pulse).
Figure 14.21 Operation Timing when Measuring a Pulse Period
Count source
“H”
Measurement pulse
“L”
Reload register counter
transfer timing
Timing at which counter
reaches “0000h”
Transfer
(indeterminate
value)
Transfer
(measured value)
Transfer Transfer
(measured (measured value)
value)
(NOTE 1)
(NOTE 1)
(NOTE 1) _{(NOTE 1)}
(NOTE 2)
TBiS bit
“1”
“0”
IR bit in TBiIC
“1”
register
“0”
“1”
MR3 bit in TBiMR
register
“0”
Set to “0” upon accepting an interrupt request or by
writing in program
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
i = 0 to 2
NOTES :
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are “10b” (measure the
interval from a falling edge to the next rising edge and the interval from a rising edge to the next falling edge of the
measurement pulse).
Figure 14.22 Operation Timing when Measuring a Pulse Width
Rev.1.22 Mar 29, 2007 Page 118 of 291
REJ09B0179-0122