M16C30P_07 Datasheet, PDF (310/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

REVISION HISTORY
M16C/30P Group Hardware Manual
Rev.
Date
Description
Page
Summary
46 Figure 9.6 Example of Sub Clock Connection Circuit is partly revised.
49 Table 9.3 Pin Status During Wait Mode is partly revised.
50 Table 9.4 Interrupts to Exit Wait Mode and Use Conditions is partly
revised.
51 9.4.3 Stop Mode is partly revised.
Table 9.5 Interrupts to Exit Stop Mode and Use Conditions id added.
76 12.1 Cold Start / Warm Start moved to 5. Reset.
78 Table 13.1 DMAC Specifications is partly revised.
83 13.1.2 Effect of BYTE Pin Level is added.
85 Table 13.2 DMA Transfer Cycles is partly revised.
Table 13.3 Coefficient J, k is partly revised.
115 Figure 15.1 UART0 Block Diagram is partly revised.
116 Figure 15.2 UART1 Block Diagram is partly revised.
117 Figure 15.3 UART2 Block Diagram is partly revised.
119 Note 3 is added in Figure 15.5 UiRB Register.
126 Note 2 is partly revised in Table 15.1 Clock Synchronous Serial I/O Mode
Specifications.
129 Figure 15.12 Transmit and Receive Operation is revised.
134 Note 1 is partly revised in Table 15.5 UART Mode Specifications.
137 Figure 15.18 Transmit Operation is revised.
138 Table 15.9 Example of Bit Rates and Settings is partly revised.
144 Note 4 is added in table 15.11 Registers to Be Used and Settings in I²C
Mode.
161 Figure 15.33 Transmit and Receive Timing in SIM Mode is revised.
163 15.1.6.2 Format is revised.
178 Figure 17.3 CRC Calculation is partly revised.
179 18.1 Port Pi Direction Register is partly revised.
18.2 Port Pi Register is partly revised.
18.3 Pull-up Control Register 0 to Pull-up Control Register 2 is partly
revised.
184 Figure 18.6 I/O Pins is partly revised.
185 Note 2 is added in Figure 18.7 PDi Registers.
186 Note 2 is added in Figure 18.8 Pi Registers.
187 Note 2 is added in Figure 18.9 PUR0 Register.
Note 3 to 5 are added in Figure 18.9 PUR1 Register.
190 Table 18.2 Unassigned Pin Handling in Memory Expansion Mode and
Microprocessor Mode is added.
191 Figure 18.11 Unassigned Pins Handling is revised.
193 Table 19.2 Recommended Operating Conditions is partly revised.
194 Table 19.3 A/D Conversion Characteristics is partly revised.
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