M16C30P_07 Datasheet, PDF (81/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
11. Interrupt
11.4.2 Relocatable Vector Tables
The 256 bytes beginning with the start address set in the INTB register comprise a reloacatable vector table
area. Table 11.2 lists the Relocatable Vector Tables. Setting an even address in the INTB register results in the
interrupt sequence being executed faster than in the case of odd addresses.
Table 11.2 Relocatable Vector Tables
Interrupt Source
BRK Instruction ⁽⁵⁾
−(Reserved)
INT3
−
UART1 Bus Collision Detect ^{(4, 6)}
UART0 Bus Collision Detect ^{(4, 6)}
−
INT4 ⁽²⁾
UART 2 Bus Collision Detection ⁽⁶⁾
DMA0
DMA1
Key Input Interrupt
A/D
UART2 Transmit, NACK2 ⁽³⁾
UART2 Receive, ACK2 ⁽³⁾
UART0 Transmit, NACK0 ⁽³⁾
UART0 Receive, ACK0 ⁽³⁾
UART1 Transmit, NACK1 ⁽³⁾
UART1 Receive, ACK1 ⁽³⁾
Timer A0
Timer A1
Timer A2
−
−
Timer B0
Timer B1
Timer B2
INT0
INT1
INT2
Software Interrupt ⁽⁵⁾
Vector Address ⁽¹⁾
Address (L) to Address (H)
+0 to +3 (0000h to 0003h)
−
+16 to +19 (0010h to 0013h)
−
+24 to +27 (0018h to 001Bh)
+28 to +31 (001Ch to 001Fh)
−
+36 to +39 (0024h to 0027h)
+40 to +43 (0028h to 002Bh)
+44 to +47 (002Ch to 002Fh)
+48 to +51 (0030h to 0033h)
+52 to +55 (0034h to 0037h)
+56 to +59 (0038h to 003Bh)
+60 to +63 (003Ch to 003Fh)
+64 to +67 (0040h to 0043h)
+68 to +71 (0044h to 0047h)
+72 to +75 (0048h to 004Bh)
+76 to +79 (004Ch to 004Fh)
+80 to +83 (0050h to 0053h)
+84 to +87 (0054h to 0057h)
+88 to +91 (0058h to 005Bh)
+92 to +95 (005Ch to 005Fh)
−
−
+104 to +107 (0068h to 006Bh)
+108 to +111 (006Ch to 006Fh)
+112 to +115 (0070h to 0073h)
+116 to +119 (0074h to 0077h)
+120 to +123 (0078h to 007Bh)
+124 to +127 (007Ch to 007Fh)
+128 to +131 (0080h to 0083h)
to
+252 to +255 (00FCh to 00FFh)
Software Interrupt
Number
0
1 to 3
Reference
M16C/60, M16C/20
Series software manual
4
11.6 INT interrupt
5
−
6
15. Serial Interface
7
8
−
9
11.6 INT interrupt
10
15. Serial Interface
11
13. DMAC
12
13
11.8 Key Input Interrupt
14
16. A/D Converter
15
15. Serial Interface
16
17
18
19
20
21
14. Timers
22
23
24
−
25
−
26
14. Timers
27
28
29
11.6 INT interrupt
30
31
32
M16C/60, M16C/20
to
Series software manual
63
NOTES:
1. Address relative to address in INTB.
2. Use the IFSR6 bit in the IFSR register to select.
3. During I²C mode, NACK and ACK interrupts comprise the interrupt source.
4. Use the IFSR26 and IFSR27 bits in the IFSR2A register to select.
5. These interrupts cannot be disabled using the I flag.
6. Bus collision detection : During IE mode, this bus collision detection constitutes the factor of an interrupt.
During I²C mode, however, a start condition or a stop condition detection constitutes
the factor of an interrupt.
Rev.1.22 Mar 29, 2007 Page 65 of 291
REJ09B0179-0122