M16C30P_07 Datasheet, PDF (177/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
15. Serial Interface
15.1.5 Special Mode 3 (IE mode)(UART2)
In this mode, one bit of IEBus is approximated with one byte of UART mode waveform.
Table 15.17 lists the Registers to Be Used and Settings in IE Mode. Figure 15.32 shows the Bus Collision
Detect Function-Related BitsBus Collision Detect Function-Related Bits.
If the TXD2 pin output level and RXD2 pin input level do not match, a UART2 bus collision detect interrupt
request is generated.
Table 15.17 Registers to Be Used and Settings in IE Mode
Register
U2TB
U2RB ⁽²⁾
U2BRG
U2MR
U2C0
U2C1
U2SMR
U2SMR2
U2SMR3
U2SMR4
Bit
Function
0 to 8
Set transmission data
0 to 8
Reception data can be read
OER, FER, PER, SUM Error flag
0 to 7
Set a bit rate
SMD2 to SMD0
Set to “110b”
CKDIR
Select the internal clock or external clock
STPS
Set to “0”
PRY
Invalid because PRYE=0
PRYE
Set to “0”
IOPOL
Select the TXD/RXD input/output polarity
CLK1, CLK0
Select the count source for the U2BRG register
CRS
Invalid because CRD=1
TXEPT
Transmit register empty flag
CRD
Set to “1”
NCH
Select TXD2 pin output mode ⁽¹⁾
CKPOL
Set to “0”
UFORM
Set to “0”
TE
Set this bit to “1” to enable transmission
TI
Transmit buffer empty flag
RE
Set this bit to “1” to enable reception
RI
Reception complete flag
U2IRS
Select the source of UART2 transmit interrupt
U2RRM,
U2LCH, U2ERE
Set to “0”
0 to 3, 7
Set to “0”
ABSCS
Select the sampling timing at which to detect a bus collision
ACSE
Set this bit to “1” to use the auto clear function of transmit enable bit
SSS
Select the transmit start condition
0 to 7
Set to “0”
0 to 7
Set to “0”
0 to 7
Set to “0”
NOTES:
1. TXD2 pin is N channel open-drain output. No NCH bit in the U2C0 register is assigned. When write, set to “0”.
2. Not all register bits are described above. Set those bits to “0” when writing to the registers in IE mode.
Rev.1.22 Mar 29, 2007 Page 161 of 291
REJ09B0179-0122