M16C30P_07 Datasheet, PDF (58/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
7. Bus
(1) Separate Bus, No Wait Setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
(2) Separate Bus, 1-Wait Setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
Bus cycle ⁽¹⁾
Bus cycle ⁽¹⁾
Output
Address
Input
Address
Bus cycle ⁽¹⁾
Bus cycle ⁽¹⁾
Output
Address
Input
Address
NOTES :
1. These example timing charts indicate bus cycle length. After this bus cycle sometimes come read and write cycles in
succession.
Figure 7.5 Typical Bus Timings Using Software Wait
Rev.1.22 Mar 29, 2007 Page 42 of 291
REJ09B0179-0122