M16C30P_07 Datasheet, PDF (132/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
14. Timers
14.2.3 Pulse Period and Pulse Width Measurement Mode
In pulse period and pulse width measurement mode, the timer measures pulse period or pulse width of an
external signal (see Table 14.8). Figure 14.20 shows TBiMR Register in Pulse Period and Pulse Width
Measurement Mode. Figure 14.21 shows the Operation Timing when Measuring a Pulse Period. Figure 14.22
shows the Operation Timing when Measuring a Pulse Width.
Table 14.8 Specifications in Pulse Period and Pulse Width Measurement Mode
Item
Count Source
Count Operation
Count Start Condition
Count Stop Condition
Interrupt Request
Generation Timing
TBiIN Pin Function
Read from Timer
Write to Timer
Specification
f1, f2, f8, f32, fC32
• Up-count
• Counter value is transferred to reload register at an effective edge of
measurement pulse. The counter value is set to “0000h” to continue counting.
Set TBiS (i=0 to 2) bit ⁽³⁾ to “1” (= start counting)
Set TBiS bit to “0” (= stop counting)
• When an effective edge of measurement pulse is input ⁽¹⁾
• Timer overflow. When an overflow occurs, MR3 bit in the TBiMR register is set
to “1” (overflowed) simultaneously. MR3 bit is set to “0” (no overflow) by
writing to TBiMR register at the next count timing or later after MR3 bit was set
to “1”. At this time, make sure TBiS bit is set to “1” (start counting).
Measurement pulse input
Contents of the reload register (measurement result) can be read by reading TBi
register ⁽²⁾
Value written to TBi register is written to neither reload register nor counter
NOTES:
1. Interrupt request is not generated when the first effective edge is input after the timer started
counting.
2. Value read from TBi register is indeterminate until the second valid edge is input after the timer
starts counting.
3. The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
Rev.1.22 Mar 29, 2007 Page 116 of 291
REJ09B0179-0122