M16C30P_07 Datasheet, PDF (75/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
9. Clock Generating Circuit
Table 9.7 Allowed Transition and Setting
Current
State
High-Speed Mode,
Middle-Speed Mode
Low-Speed Mode
High-Speed Mode,
Middle-Speed Mode
(NOTE 4)
(8)
State After Transition
Low-Speed
Mode
Low Power
Dissipation Mode
(9)^{(NOTE 3)}
−
(11)^{(NOTE 2)}
Low Power
Dissipation Mode
−
(10)
Stop Mode
(14)^{(NOTE 1)}
(14)
(14)
Wait Mode
(14)
(14)
(14)
Stop Mode
(12)
(12)
(12)
−
Wait Mode
(13)
(13)
(13)
−
−: Cannot transit
NOTES:
1. When exiting stop mode, the CM06 bit is set to “1” (division by 8 mode).
2. If the CM05 bit set to “1” (main clock stop), then the CM06 bit is set to “1” (division by 8 mode).
3. A transition can be made only when sub clock is oscillating.
4. State transitions within the same mode (divide-by-n values changed or subclock oscillation turned on or off) are shown in the
table below.
No Division
No
Division
Divided by 2
(3)
Divided by 4
(3)
Divided by 8
(3)
Divided by 16 (3)
No Division
(2)
Divided by 2
−
Divided by 4
−
Divided by 8
−
Divided by 16 −
Sub Clock Oscillating
Divided Divided Divided
by 2
by 4
by 8
(4)
(5)
(7)
(5)
(7)
(4)
(7)
(4)
(5)
(4)
(5)
(7)
−
−
−
(2)
−
−
−
(2)
−
−
−
(2)
−
−
−
Divided
by 16
(6)
(6)
(6)
(6)
−
−
−
−
(2)
5. ( ) : setting method. See the following table.
Setting
Operation
(1) CM04 = 0
Sub clock turned off
(2) CM04 = 1
Sub clock oscillating
(3) CM06 = 0, CM17 = 0, CM16 = 0 CPU clock no division mode
(4) CM06 = 0, CM17 = 0, CM16 = 1 CPU clock division by 2 mode
(5) CM06 = 0, CM17 = 1, CM16 = 0 CPU clock division by 4 mode
(6) CM06 = 0, CM17 = 1, CM16 = 1 CPU clock division by 16 mode
(7) CM06 = 1
CPU clock division by 8 mode
(8) CM07 = 0
Main clock selected
(9) CM07 = 1
Sub clock selected
(10) CM05 = 0
Main clock oscillating
(11) CM05 = 1
Main clock turned off
(12) CM10 = 1
Transition to stop mode
(13) Wait Instruction
Transition to wait mode
(14) Hardware Interrupt
Exit stop mode or wait mode
CM04, CM05, CM06, CM07 : Bits in CM0 register
CM10, CM16, CM17
: Bits in CM1 register
No
Division
(1)
−
−
−
−
(3)
(3)
(3)
(3)
Sub Clock Turned Off
Divided Divided Divided
by 2
by 4
by 8
−
−
−
(1)
−
−
−
(1)
−
−
−
(1)
−
−
−
Divided
by 16
−
−
−
−
(1)
(4)
(5)
(7)
(6)
(5)
(7)
(6)
(4)
(7)
(6)
(4)
(5)
(6)
(4)
(5)
(7)
−: Cannot transit
Rev.1.22 Mar 29, 2007 Page 59 of 291
REJ09B0179-0122