M16C30P_07 Datasheet, PDF (186/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
16. A/D Converter
A/D Control Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
After Reset
ADCON0
03D6h
000X0XXXb
Bit Symbol
Bit Name
Function
RW
Analog Input Pin Select Bit
b2 b1 b0
CH0
0 0 0 : AN0 is selected
RW
0 0 1 : AN1 is selected
0 1 0 : AN2 is selected
CH1
0 1 1 : AN3 is selected
RW
1 0 0 : AN4 is selected
1 0 1 : AN5 is selected
1 1 0 : AN6 is selected
CH2
1 1 1 : AN7 is selected
RW
A/D Operation Mode Select Bit 0 : One-shot mode
MD0 ₀
1 : Repeat mode
RW
—
Nothing is assigned.
(b4) When w rite, set to “0”. When read, its content is ndeterminate.
—
Trigger Select Bit
0 : Softw are trigger
TRG
________
RW
1 : ADTRG trigger
A/D Conversion Start Flag 0 : A/D conversion disabled
ADST
1 : A/D conversion started
RW
Frequency Select Bit 0
CKS0
Ref er to NOTE 2 for the ADCON2 Re gister
RW
NOTES :
1. If the ADCON0 register is rew ritten during A/D conversion, the conversion result w ill be indeterminate.
A/D Control Register 1 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
After Reset
ADCON1
03D7h
00000XXXb
Symbol
Address
After Reset
RW
—
Nothing is assigned.
(b0) When w rite, set to “0”. When read, its content is indeterminate.
—
—
Nothing is assigned.
(b1) When w rite, set to “0”. When read, its content is indeterminate.
—
—
Nothing is assigned.
(b2) When w rite, set to “0”. When read, its content is indeterminate.
—
8/10-Bit Mode Select Bit
0 : 8-bit mode
BITS
1 : 10-bit mode
RW
Frequency Select Bit 1
CKS1
Ref er to NOTE 2 for the ADCON2 Re gister
RW
Vref Connect Bit ⁽²⁾
0 : Vref not connected
VCUT
1 : Vref connected
RW
External Op-Amp Connection b7 b6
OPA0 _{Mode Bit}
0 0 : ANEX0 and ANEX1 are not used
RW
0 1 : ANEX0 input is A/D converted
OPA1
1 0 : ANEX1 input is A/D converted
RW
1 1 : Do not set
NOTES :
1. If the ADCON1 register is rew ritten during A/D conversion, the conversion result w ill be indeterminate.
2. If the VCUT bit is reset from “0” (Vref unconnected) to “1” (Vref connected), w ait for 1 µs or more before starting
A/D conversion.
Figure 16.2 ADCON0 to ADCON1 Registers
Rev.1.22 Mar 29, 2007 Page 170 of 291
REJ09B0179-0122