M16C30P_07 Datasheet, PDF (312/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

REVISION HISTORY
M16C/30P Group Hardware Manual
Rev.
1.10
1.11
Date
Oct 01, 2005
May 31, 2006
Description
Page
Summary
2 Table 1.1 Performance Outline of M16C/30P Group is partly revised.
4 Table 1.2 Product List is partly revised.
Figure 1.2 Type No., Memory Size, and Package is partly revised.
5 Table 1.3 Product Code of Mask ROM version Version for M16C/30P is
added.
Figure 1.3 Marking Diagram of Mask ROM Version for M16C/30P is
added.
6 Figure 1.4 Marking Diagram of ROM -less Version for M16C/30P is added.
6 Table 1.4 Product Code of ROM-less version for M16C/30P is added.
16 Figure 3.1 Memory Map is partly added.
32 Figure 6.3 Memory Map is partly added.
54 9.4.3.3 Exiting Stop Mode is partly revised.
85 13.1 Transfer Cycles information is added.
99 14.1.2 Event Counter Mode is partly revised.
101 Information is added
123 Note 5 is added in Figure 15.7 UiC0 Register.
194 Table 19.2 information is revised.
236 Appendix Table 2.1 Function Difference
Memory is partly added.
1 A note is add in Chapter 1. Overview.
2 Table 1.1 Performance Outline of M16C/30P Group is partly revised.
4 1.4 Product List information is added.
Table 1.2 Product List is partly revised.
5 Figure 1.2 Type No., Memory Size, and Package is added.
7 Table 1.4 Product Code of Flash Memory version and ROM-less version
for M16C/30P is added.
Figure 1.4 Marking Diagram of Flash Memory version and ROM-less
Version for M16C/30P (Top View) is partly added.
17 3. Memory information is revised.
Figure 3.1 Memory Map is partly revised.
18 Table 4.1 SFR Information(1) is partly revised.
19 Table 4.2 SFR Information(2) is partly added.
23 5.1 Hardware Reset information is deleted.
29 Table 6.1 Features of Processor Modes is partly deleted.
31 Figure 6.2 PM1 Register is partly revised.
32 Figure 6.3 Memory Map in Single Chip Mode is partly added.
39 Table 7.5 Pin Functions for Each Processor Mode NOTES is partly deleted.
42 Figure 8.1 Memory Mapping and CS Area in 1-Mbyte mode is partly revised.
62 11.4.1 Fixed Vector Tables Information is added.
63 Table 11.2 Relocatable Vector Tables is partly added.
65 Figure 11.4 Interrupt Control Registers (2) NOTES 4 is added.
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