M16C30P_07 Datasheet, PDF (126/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
14. Timers
14.2 Timer B
Figure 14.15 shows a Timer B Block Diagram. Figures 14.16 and 14.17 show registers related to the Timer B.
Timer B supports the following three modes. Use the TMOD1 and TMOD0 bits in the TBiMR register (i = 0 to 2)
to select the desired mode.
• Timer Mode:
The timer counts an internal count source.
• Event Counter Mode:
The timer counts pulses from an external device or overflows or
underflows of other timers.
• Pulse Period/Pulse Width Measurement Mode:
The timer measures pulse period or pulse width of an external signal.
High-order Bits of Data Bus
Select Clock Source
TCK1 to TCK0
f1 or f2 ⁰⁰
f8 ⁰¹
00: Timer
10: Pulse Period and Pulse Width
f32 ¹⁰
Measurement
fC32 ¹¹
TBj Overflow ^{(1, 2)}
TCK1
1
01: Event Counter
TBiIN
Polarity Switching
and Edge Pulse
0
TMOD1 to TMOD0
TBiS
Counter Reset Circuit
Low-order Bits of Data Bus
8 low-order
bits
Reload Register
8 high-order
bits
Counter
i=0 to 2
NOTES:
1. Overflows or underflows.
2. j=i-1, however, j=2 when i=0
TCK1 to TCK0, TMOD1 to TMOD0 : Bits in TAiMR register
TBiS : Bits in the TABSR and the TBSR register
TBi
Timer B0
Timer B1
Timer B2
Address
TBj
0391h - 0390h Timer B2
0393h - 0392h Timer B0
0395h - 0394h Timer B1
Figure 14.15 Timer B Block Diagram
Rev.1.22 Mar 29, 2007 Page 110 of 291
REJ09B0179-0122