English
Language : 

M16C30P_07 Datasheet, PDF (169/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES
M16C/30P Group
15. Serial Interface
Table 15.14 STSPSEL Bit Functions
Function
Output of SCLi and SDAi Pins
Start/Stop Condition Interrupt
Request Generation Timing
STSPSEL = 0
Output of transfer clock and data
Output of start/stop condition is
accomplished by a program using
ports (not automatically generated
in hardware)
Start/stop condition detection
STSPSEL = 1
Output of a start/stop condition
according to the STAREQ,
RSTAREQ and STPREQ bit
Finish generating start/stop
condition
(1) When Slave
CKDIR=1 (external clock)
STSPSEL bit 0
SCLi
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
SDAi
Start condition
detection interrupt
Stop condition
detection interrupt
(2) When Master
CKDIR=0 (internal clock), CKPH=1 (clock delayed)
STSPSEL bit
SCLi
SDAi
Set to “1” in
a program
Set to “0” in
Set to “1” in
a program
a program
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
Set to “0” in
a program
Set STAREQ=1
(start)
Set STPREQ=1
Start condition detection (start)
interrupt
Stop condition detection
interrupt
Figure 15.27 STSPSEL Bit Functions
15.1.3.3 Arbitration
Unmatching of the transmit data and SDAi pin input data is checked synchronously with the rising edge of
SCLi. Use the ABC bit in the UiSMR register to select the timing at which the ABT bit in the UiRB register is
updated. If the ABC bit = 0 (updated bitwise), the ABT bit is set to “1” at the same time unmatching is detected
during check, and is cleared to “0” when not detected. In cases when the ABC bit is set to “1”, if unmatching is
detected even once during check, the ABT bit is set to “1” (unmatching detected) at the falling edge of the clock
pulse of 9th bit. If the ABT bit needs to be updated bytewise, clear the ABT bit to “0” (undetected) after
detecting acknowledge in the first byte, before transferring the next byte.
Setting the ALS bit in the UiSMR2 register to “1” (SDA output stop enabled) factors arbitration-lost to occur, in
which case the SDAi pin is placed in the high-impedance state at the same time the ABT bit is set to “1”
(unmatching detected).
Rev.1.22 Mar 29, 2007 Page 153 of 291
REJ09B0179-0122