M16C30P_07 Datasheet, PDF (163/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
15. Serial Interface
SDAi
Delay
circuit
STSPSEL=1
STSPSEL=0
ACK=1 ACK=0
ACKD register
Noise
Filter
SDHI
ALS
D _{Q Arbitration}
T
Start condition
detection
Stop condition
detection
Start and stop condition generation block
SDA(STSP)
SCL(STSP)
Transmission
register
UARTi
IICM2=1
IICM=1 and
IICM2=0
Reception register
UARTi
S
Q
Bus
R _busy
IICM2=1
IICM=1 and
IICM2=0
NACK
DMA0, DMA1 request
(UART1: DMA0 only)
UARTi transmit,
NACK interrupt
request
DMA0
(UART0, UART2)
UARTi receive,
ACK interrupt request,
DMA1 request
SCLi
Noise
Filter
Falling edge
detection
IICM=0
R _{Port register}⁽¹⁾
I/O port Q
STSPSEL=0
Internal clock
DQ
T
DQ
T
9th bit
IICM=1UARTi
STSPSEL=1
SWC2
External
clock
CLK
control
UARTi
ACK
Start/stop condition detection
interrupt request
R
9th bit falling edge
S
SWC
This diagram applies to the case where the SMD2 to SMD0 bits in the UiMR register = 010b and the IICM bit in the UiSMR register = 1.
IICM
: Bit in UiSMR register
IICM2, SWC, ALS, SWC2, SDHI : Bit in UiSMR2 register
STSPSEL, ACKD, ACKC
: Bit in UiSMR4 register
i=0 to 2
NOTES :
1. If the IICM bit = 1, the pin can be read even when the PD6_2, PD6_6 or PD7_1 bit = 1 (output mode).
Figure 15.24 I²C Mode Block Diagram
Rev.1.22 Mar 29, 2007 Page 147 of 291
REJ09B0179-0122