M16C30P_07 Datasheet, PDF (50/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

M16C/30P Group
7. Bus
7. Bus
During memory expansion or microprocessor mode, some pins serve as the bus control pins to perform data input/
output to and from external devices. These bus control pins include A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/
WR, WRH/BHE, ALE, RDY, HOLD, HLDA and BCLK.
7.1 Bus Mode
The bus mode is the "separate bus mode" that separates data and address.
7.2 Bus Control
The following describes the signals needed for accessing external devices and the functionality of software wait.
7.2.1 Address Bus
The address bus consists of 20 lines, A0 to A19. The address bus width can be chosen to be 16 or 20 bits by
using the PM06 bit in the PM0 register. Table 7.1 shows the PM06 Bit Set Value and Address Bus Width.
Table 7.1 PM06 Bit Set Value and Address Bus Width
Set Value ⁽¹⁾
Pin Function
Address Bus Width
PM06=1
P4_0 to P4_3
16 bits
PM06=0
A16 to A19
20 bits
NOTES:
1. No values other than those shown above can be set.
When processor mode is changed from single-chip mode to memory extension mode, the address bus is
indeterminate until any external area is accessed.
7.2.2 Data Bus
When input on the BYTE pin is high (data bus is 8 bits wide), 8 lines D0 to D7 comprise the data bus; when
input on the BYTE pin is low(data bus is 16 bits wide), 16 lines D0 to D15 comprise the data bus.
Do not change the input level on the BYTE pin while in operation.
Rev.1.22 Mar 29, 2007 Page 34 of 291
REJ09B0179-0122