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M16C30P_07 Datasheet, PDF (147/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES
M16C/30P Group
15. Serial Interface
Table 15.2 Registers to Be Used and Settings in Clock Synchronous Serial I/O Mode
Register
UiTB (3)
UiRB (3)
UiBRG
UiMR (3)
UiC0
UiC1
UiSMR
UiSMR2
UiSMR3
UiSMR4
UCON
Bit
0 to 7
0 to 7
OER
0 to 7
SMD2 to SMD0
CKDIR
IOPOL
CLK1 to CLK0
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS (1)
U2RRM (1)
UiLCH
UiERE
0 to 7
0 to 7
0 to 2
NODC
4 to 7
0 to 7
U0IRS, U1IRS
U0RRM, U1RRM
CLKMD0
CLKMD1
RCSP
7
Function
Set transmission data
Reception data can be read
Overrun error flag
Set a bit rate
Set to “001b”
Select the internal clock or external clock
Set to “0”
Select the count source for the UiBRG register
Select CTS or RTS to use
Transmit register empty flag
Enable or disable the CTS or RTS function
Select TXDi pin output mode (2)
Select the transfer clock polarity
Select the LSB first or MSB first
Set this bit to “1” to enable transmission/reception
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Select the source of UART2 transmit interrupt
Set this bit to “1” to use continuous receive mode
Set this bit to “1” to use inverted data logic
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Select clock output mode
Set to “0”
Set to “0”
Select the source of UART0/UART1 transmit interrupt
Set this bit to “1” to use continuous receive mode
Select the transfer clock output pin when CLKMD1 = 1
Set this bit to “1” to output UART1 transfer clock from two pins
Set this bit to “1” to accept as input the CTS0 signal of the UART0 from
the P6_4 pin
Set to “0”
NOTES:
1. Set the bit 4 and bit 5 in the U0C1 and U1C1 register to “0”. The U0IRS, U1IRS, U0RRM and
U1RRM bits in the UCON register.
2. TXD2 pin is N channel open-drain output. Set the NCH bit in the U2C0 register to “0”.
3. Not all register bits are described above. Set those bits to “0” when writing to the registers in clock
synchronous serial I/O mode.
i=0 to 2
Rev.1.22 Mar 29, 2007 Page 131 of 291
REJ09B0179-0122