M16C30P_07 Datasheet, PDF(155/317 Page) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

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M16C30P_07 Datasheet, PDF (155/317 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/30 SERIES

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M16C/30P Group

15. Serial Interface

Table 15.6 Registers to Be Used and Settings in UART Mode

Register

UiTB

UiRB

UiBRG

UiMR

UiC0

UiC1

UiSMR

UiSMR2

UiSMR3

UiSMR4

UCON

Bit

Function

0 to 8

Set transmission data (1)

0 to 8

Reception data can be read (1)

OER,FER,PER,SUM Error flag

0 to 7

Set a bit rate

SMD2 to SMD0

Set these bits to â100bâ when transfer data is 7 bits long

Set these bits to â101bâ when transfer data is 8 bits long

Set these bits to â110bâ when transfer data is 9 bits long

CKDIR

Select the internal clock or external clock

STPS

Select the stop bit

PRY, PRYE

Select whether parity is included and whether odd or even

IOPOL

Select the TXD/RXD input/output polarity

CLK0, CLK1

Select the count source for the UiBRG register

CRS

Select CTS or RTS to use

TXEPT

Transmit register empty flag

CRD

Enable or disable the CTS or RTS function

NCH

Select TXDi pin output mode (3)

CKPOL

Set to â0â

UFORM

LSB first or MSB first can be selected when transfer data is 8 bits long. Set this

bit to â0â when transfer data is 7 or 9 bits long.

TE

Set this bit to â1â to enable transmission

TI

Transmit buffer empty flag

RE

Set this bit to â1â to enable reception

RI

Reception complete flag

U2IRS (2)

Select the source of UART2 transmit interrupt

U2RRM (2)

Set to â0â

UiLCH

Set this bit to â1â to use inverted data logic

UiERE

Set to â0â

0 to 7

Set to â0â

0 to 7

Set to â0â

0 to 7

Set to â0â

0 to 7

Set to â0â

U0IRS, U1IRS

Select the source of UART0/UART1 transmit interrupt

U0RRM, U1RRM Set to â0â

CLKMD0

Invalid because CLKMD1 = 0

CLKMD1

Set to â0â

RCSP

Set this bit to â1â to accept as input CTS0 signal of UART0 from the P6_4 pin

7

Set to â0â

NOTES:

1. The bits used for transmit/receive data are as follows: Bit 0 to bit 6 when transfer data is 7 bits long; bit 0 to bit

7 when transfer data is 8 bits long; bit 0 to bit 8 when transfer data is 9 bits long.

2. Set the bit 4 to bit 5 in the U0C1 and U1C1 registers to â0â. The U0IRS, U1IRS, U0RRM and U1RRM bits are

included in the UCON register.

3. TXD2 pin is N channel open-drain output. Set the NCH bit in the U2C0 register to â0â.

i=0 to 2

Rev.1.22 Mar 29, 2007 Page 139 of 291

REJ09B0179-0122

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