UPD78F9234MC-5A4-A Datasheet, PDF (77/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATORS
5.3 Registers Controlling Clock Generators
The clock generators are controlled by the following four registers.
• Processor clock control register (PCC)
• Preprocessor clock control register (PPCC)
• Low-speed internal oscillation mode register (LSRCM)
• Oscillation stabilization time select register (OSTS)
(1) Processor clock control register (PCC) and preprocessor clock control register (PPCC)
These registers are used to specify the division ratio of the system clock.
PCC and PPCC are set by using a 1-bit or 8-bit memory manipulation instruction.
Generation of reset signal sets PCC and PPCC to 02H.
Figure 5-2. Format of Processor Clock Control Register (PCC)
Address: FFFBH After reset: 02H R/W
Symbol
7
6
5
4
3
2
1
0
PCC
0
0
0
0
0
0
PCC1
0
Figure 5-3. Format of Preprocessor Clock Control Register (PPCC)
Address: FFF3H After reset: 02H R/W
Symbol
7
6
5
4
3
2
1
0
PPCC
0
0
0
0
0
0
PPCC1
PPCC0
PPCC1
PPCC0
PCC1
0
0
0
0
1
0
0
0
1
1
0
0
0
1
1
1
0
1
Other than above
Selection of CPU clock (fCPU)
fX
fX/2 ^{Note 1}
fX/2²
f /2^{2 Note 2}
X
f /2^{3 Note 1}
X
f /2^{4 Note 2}
X
Setting prohibited
Notes 1. If PPCC = 01H, the clock (fXP) supplied to the peripheral hardware is fX/2.
2. If PPCC = 02H, the clock (fXP) supplied to the peripheral hardware is fX/2².
User’s Manual U17446EJ5V0UD
75