UPD78F9234MC-5A4-A Datasheet, PDF (137/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 7 8-BIT TIMER 80
7.5 Notes on 8-bit Timer 80
(1) Error when timer starts
The time from starting the timer to generation of the match signal includes an error of up to 1.5 clocks. This is
because, if the timer is started while the count clock is high, the rising edge may be immediately detected and
the counter may be incremented (refer to Figure 7-6).
Figure 7-6. Case Where Error of 1.5 Clocks (Max.) Occurs
Selected clock
TCE80
Selected clock
TCE80
Clear signal
Count pulse
TM80 count value
Delay A
Count pulse
8-bit timer counter 80
(TM80)
Clear signal
Delay B
00H
01H
02H
03H
...
Delay A
Delay B
If the timer is started when the selected clock is high
and if delay A > delay B, an error of up to 1.5 clocks occurs.
(2) Setting of 8-bit compare register 80
8-bit compare register 80 (CR80) can be set to 00H.
(3) Note on setting STOP mode
Before executing the STOP instruction, be sure to stop the timer operation (TCE80 = 0).
User’s Manual U17446EJ5V0UD
135