UPD78F9234MC-5A4-A Datasheet, PDF (269/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 17 LOW-VOLTAGE DETECTOR
Figure 17-6. Example of Software Processing After Release of Reset (1/2)
• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
Reset
Initialization
processing <1>
LVI reset
Setting LVI
; Check reset source^Note
Initialization of ports
Setting WDT
; The detection level is set with LVIS.
The low-voltage detector is operated (LVION = 1)
Setting 8-bit timer H1
(50 ms is measured)
; fXP = High-speed internal oscillation clock (8.4 MHz (MAX.))/2² (default value)
Source: fXP (2.1 MHz (MAX.))/2¹²,
51 ms when the compare value is 25
Timer starts (TMHE1 = 1)
Clears WDT
Detection voltage or more ^Yes
(LVIF = 0 ?)
No
LVIF = 0
; Clear low-voltage detection flag.
Restarting the timer H1
(TMHE1 = 0 → TMHE1 = 1)
; Clear timer counter and timer starts.
No
50 ms has passed?
(TMIFH1 = 1?)
Yes
Initialization
processing <2>
; Setting the division ratio of the system clock,
timer, A/D converter, etc.
Note A flowchart is shown on the next page.
User’s Manual U17446EJ5V0UD
267