UPD78F9234MC-5A4-A Datasheet, PDF (246/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 14 STANDBY FUNCTION
14.2.2 STOP mode
(1) STOP mode setting and operating statuses
The STOP mode is set by executing the STOP instruction.
Caution Because an interrupt request signal is used to clear the standby mode, if there is an interrupt
source with the interrupt request flag set and the interrupt mask flag reset, the standby
mode is immediately cleared if set. Thus, in the STOP mode, the normal operation mode is
restored after the STOP instruction is executed and then the operation is stopped for 34 μs
(TYP.) (after an additional wait time for stabilizing the oscillation set by the oscillation
stabilization time select register (OSTS) has elapsed when crystal/ceramic oscillation is
used).
The operating statuses in the STOP mode are shown below.
Table 14-4. Operating Statuses in STOP Mode
Setting of HALT Mode
Low-Speed Internal
Low-Speed Internal Oscillator Can Be Stopped^Note
Oscillator Cannot Be
When Low-Speed Internal When Low-Speed Internal
Item
Stopped^Note
Oscillation Continues
Oscillation Stops
System clock
Oscillation stops.
CPU
Operation stops.
Port (latch)
Holds status before STOP mode is set.
16-bit timer/event counter 00
Operation stops.
8-bit timer 80
8-bit timer
H1
Sets count clock to fXP to fXP/2¹²
Sets count clock to fRL/2⁷
Operation stops.
Operation stops.
Operable
Operable
Operation stops.
Watchdog “Clock to peripheral hardware” Setting prohibited
timer
selected as operating clock
Operation stops.
“Low-speed internal oscillation
clock” selected as operating
clock
Operable (Operation
continues.)
Operation stops.
A/D converter
Operation stops.
Serial interface UART6
Operation stops.
Power-on-clear circuit
Always operates.
Low-voltage detector
Operable
External interrupt
Operable
Note “Cannot be stopped” or “Stopped by software” is selected for low-speed internal oscillator by the option byte
(for the option byte, see CHAPTER 18 OPTION BYTE).
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User’s Manual U17446EJ5V0UD