UPD78F9234MC-5A4-A Datasheet, PDF (37/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 3 CPU ARCHITECTURE
SP SP ^_ 2
SP ^_ 2
SP ^_ 1
SP
Figure 3-8. Data to Be Saved to Stack Memory
PUSH rp
instruction
Lower half
register pairs
Upper half
register pairs
SP SP ^_ 2
SP ^_ 2
SP ^_ 1
SP
CALL, CALLT
instructions
SP SP ^_ 3
SP ^_ 3
PC7 to PC0
SP ^_ 2
PC15 to PC8
SP ^_ 1
SP
Interrupt
PC7 to PC0
PC15 to PC8
PSW
Figure 3-9. Data to Be Restored from Stack Memory
POP rp
instruction
RET instruction
RETI instruction
SP
SP + 1
SP SP + 2
Lower half
register pairs
Upper half
register pairs
SP
SP + 1
SP SP + 2
PC7 to PC0
PC15 to PC8
SP
SP + 1
SP + 2
SP SP + 3
PC7 to PC0
PC15 to PC8
PSW
User’s Manual U17446EJ5V0UD
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