UPD78F9234MC-5A4-A Datasheet, PDF (145/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 8 8-BIT TIMER H1
(2) Timing chart
The timing of the interval timer/square-wave output operation is shown below.
Figure 8-7. Timing of Interval Timer/Square-Wave Output Operation (1/2)
(a) Basic operation (01H ≤ CMP01 ≤ FEH)
Count clock
Count start
8-bit timer counter H1 ^{00H 01H}
CMP01
N 00H 01H
Clear
N
N 00H 01H 00H
Clear
TMHE1
INTTMH1
TOH1
Interval time
<1>
<2>
<2>
<3>
Level inversion,
Level inversion,
match interrupt occurrence,
match interrupt occurrence,
8-bit timer counter H1 clear
8-bit timer counter H1 clear
<1> The count operation is enabled by setting the TMHE1 bit to 1. The count clock starts counting no more than
1 clock after the operation is enabled.
<2> When the values of 8-bit timer counter H1 and the CMP01 register match, the value of 8-bit timer counter H1
is cleared, the TOH1 output level is inverted, and the INTTMH1 signal is output.
<3> The INTTMH1 signal and TOH1 output become inactive by clearing the TMHE1 bit to 0 during timer H1
operation. If these are inactive from the first, the level is retained.
Remark 01H ≤ N ≤ FEH
User’s Manual U17446EJ5V0UD
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