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UPD78F9234MC-5A4-A Datasheet, PDF (255/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
CHAPTER 15 RESET FUNCTION
Remarks 1. For the reset timing of the power-on-clear circuit and low-voltage detector, refer to CHAPTER 16
POWER-ON-CLEAR CIRCUIT and CHAPTER 17 LOW-VOLTAGE DETECTOR.
2. fX: System clock oscillation frequency
3. When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
Table 15-1. Hardware Statuses After Reset Acknowledgment (1/2)
Program counter (PC)Note 1
Hardware
Status After Reset
Contents of reset vector
table (0000H and
0001H) are set.
Stack pointer (SP)
Undefined
Program status word (PSW)
RAM
Data memory
General-purpose registers
02H
Undefined Note 2
Undefined Note 2
Ports (P0, P2 to P4, P12, P13) (output latches)
00H
Port mode registers (PM0, PM2 to PM4, PM12)
FFH
Port mode control register (PMC2)
00H
Pull-up resistor option registers (PU0, PU2, PU3, PU4, PU12)
00H
Processor clock control register (PCC)
02H
Preprocessor clock control register (PPCC)
02H
Low-speed internal oscillation mode register (LSRCM)
00H
Oscillation stabilization time select register (OSTS)
Undefined
16-bit timer 00
Timer counter 00 (TM00)
0000H
Capture/compare registers 000, 010 (CR000, CR010)
0000H
Mode control register 00 (TMC00)
00H
Prescaler mode register 00 (PRM00)
00H
Capture/compare control register 00 (CRC00)
00H
Timer output control register 00 (TOC00)
00H
8-bit timer 80
Timer counter 80 (TM80)
00H
Compare register (CR80)
Undefined
Mode control register 80 (TMC80)
00H
8-bit timer H1
Compare registers (CMP01, CMP11)
00H
Mode register 1 (TMHMD1)
00H
Watchdog timer
Mode register (WDTM)
67H
Enable register (WDTE)
9AH
A/D converter
Conversion result registers (ADCR, ADCRH)
Undefined
Mode register (ADM)
00H
Analog input channel specification register (ADS)
00H
Notes 1.
2.
Only the contents of PC are undefined while reset signal generation and while the oscillation stabilization
time elapses. The statuses of the other hardware units remain unchanged.
The status after reset is held in the standby mode.
User’s Manual U17446EJ5V0UD
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