UPD78F9234MC-5A4-A Datasheet, PDF (149/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 8 8-BIT TIMER H1
(2) Timing chart
The operation timing in PWM output mode is shown below.
Caution Make sure that the CMP11 register setting value (M) and CMP01 register setting value (N) are
within the following range.
00H ≤ CMP11 (M) < CMP01 (N) ≤ FFH
Figure 8-9. Operation Timing in PWM Output Mode (1/4)
(a) Basic operation (00H < CMP11 < CMP01 < FFH)
Count clock
8-bit timer counter H1 00H 01H
A5H 00H 01H 02H
A5H 00H 01H 02H
A5H 00H
CMP01
A5H
CMP11
01H
TMHE1
INTTMH1
TOH1
(TOLEV1 = 0)
<1>
<2>
<3>
<4>
TOH1
(TOLEV1 = 1)
<1> The count operation is enabled by setting the TMHE1 bit to 1. Start 8-bit timer counter H1 by masking one
count clock to count up. At this time, TOH1 output remains inactive (when TOLEV1 = 0).
<2> When the values of 8-bit timer counter H1 and the CMP01 register match, the TOH1 output level is inverted,
the value of 8-bit timer counter H1 is cleared, and the INTTMH1 signal is output.
<3> When the values of 8-bit timer counter H1 and the CMP11 register match, the level of the TOH1 output is
returned. At this time, the 8-bit timer counter value is not cleared and the INTTMH1 signal is not output.
<4> Clearing the TMHE1 bit to 0 during timer H1 operation makes the INTTMH1 signal and TOH1 output inactive.
User’s Manual U17446EJ5V0UD
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